The present application relates to semiconductor device fabrication, and more particularly to fabrication of fully-depleted metal oxide semiconductor field effect transistor (MOSFETs) with U-shaped channels.
Short channel effects in bulk MOSFETs occur when the channel length is on the same order of magnitude as the combined depletion widths of the source region and the drain region (collectively referred to herein source/drain regions). Short channel effects can undesirably impact device characteristics, such as shifting the threshold voltage.
Fully-depleted MOSFETs fabricated on ultrathin semiconductor-on-insulator (SOI) layers have received significant attention due to better short channel behavior. Fully-depleted SOI MOSFETs with U-shaped channels have been developed to allow continued device scaling while minimizing the impact of short channel effects. A challenge in fabricating fully-depleted SOI MOSFETs with U-shaped channels is the undesired dopant diffusion from each source/drain region into the underlying SOI layer. Therefore, there is need for minimizing the undesired dopant diffusion in fully-depleted SOI MOSFETs with U-shaped channels.